A distributed ISA bus network using FPGAs and LVDS links

This Master thesis has been performed by me at Hectronic AB in Uppsala, Sweden. Hectronic AB is the leading Swedish embedded ICT technology supplier and develops small PC-cards. Several of these small PC-cards follow the PC/104 standard and may for example have integrated LCD graphics, serial ports, USB support, disk interface and 10/100Mbit Ethernet. These cards are widely used by the industry, where their small size is a big advantage for built-in applications.

Johan Johansson, October 2005


This Master thesis describes the design of a distributed network with the purpose to evolve into a complete test system to test motherboards and similar units. The network encapsulates signals from an ISA bus and distributes it through a LVDS link. The LVDS network distributing the ISA bus protocol is supposed to run several meters and consist of several slave nodes testing the interfaces of the motherboards. The logic in this design is successfully implemented by the use of Field Programmable Gate Arrays (FPGAs). The advantage of using FPGAs is that they are easily configured and that they support LVDS on chip. LVDS is a differential signalling standard that support high throughput while it consumes low power.

The result of this work is a design that supports the protocols ISA, RS232 and I2C. The nodes in the network also consist of simple digital inputs and outputs. These are directly accessed through the ISA protocol. The network design is built in a modular manner that makes it very easy to add more registers and protocols. This quality will play an important role when expanding the features of the network. If a protocol has to be added, a module supporting this standard is programmed. Then the module is added to the main logic via internal registers, all accessed via the ISA bus. The strong features in this distributed network design is the flexibility using modules, the support of high speed and the great configurability of the FPGAs.

The only problem not solved in this project is the multipoint LVDS link. On the other hand, point-to-point configuration using two LVDS transceivers works perfectly. If a stable LVDS multipoint configuration for all the network nodes is not found in the future, the design is easily configured into a star-shaped network using only point-to-point LVDS links.

Download the Master thesis

A distributed ISA bus network using FPGAs and LVDS links:

My Master thesis - High quality version (*.pdf) (24 Mbyte)
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